The present invention relates to an apparatus for evaluating an amount of charge on a semiconductor device and to a method for evaluating an amount of charge on a semiconductor device by using the apparatus.
In the process of fabricating a semiconductor device, charging of the semiconductor device leads to the degradation of reliability and performance thereof. To prevent this, a method for accurately measuring the charging of a semiconductor substrate or a semiconductor device, which occurs in the fabrication process therefor, is necessary.
However, no prior art technology has heretofore provided a method which allows direct measurement of an amount of charge on a semiconductor device and only a method which estimates an amount of charge supposed to have been accumulated in a semiconductor device during the fabrication process therefor is existing. The following is two examples of such an indirect method of estimating an amount of charge.
The first example is a method disclosed in Japanese Laid-Open Patent Publication No. HEI 10-270519 using a MOS capacitor. In accordance with the method, a MOS capacitor having a structure in which a gate insulating film is sandwiched between a semiconductor substrate and an upper electrode is produced and subjected to a target process for which an amount of charge is to be evaluated. Then, a leakage current between the gate (upper electrode) and substrate of the MOS capacitor is measured and an amount of charge accumulated in the semiconductor device is estimated from the result of the measurement. The method uses the experimental fact that a gate leakage current varies depending on a total amount of charge that has flown through the gate as stress. When the charge is accumulated in the MOS capacitor by the specified process, the charge escapes toward the substrate. Since the charge that has passed through the gate insulating film upon the escape toward the substrate forms fixed charge or an interface state in the insulating film, the characteristics of the gate insulating film change so that the leakage current between the gate and the substrate also changes.
The second example is a method disclosed in Japanese Laid-Open Patent Publication No. MEI 05-90374. In accordance with the method, a transistor is produced and subjected to a target process for which an amount of charge is to be evaluated. Then, the current-voltage characteristic of the transistor is measured and an amount of charge accumulated in the semiconductor device is estimated from the difference between current values before and after the process. The method also positively uses the experimental fact that the charge forms fixed charge and an interface state upon passing through the gate insulating film, similarly to the first method, to examine a change in the quality of the gate insulating film based on a drain saturation current Idsat during the operation of the transistor and thereby indirectly examine an amount of charge.
In accordance with each of the foregoing charge-amount estimating methods, the charge produced in the process of fabricating a semiconductor device is evaluated indirectly as the degradation of the gate oxide film so that it is difficult to accurately measure an amount of charge sufficiently quantitatively.
In addition, each of the methods requires an extra step of fabricating the device or the like so that it is difficult to evaluate an amount of charge easily and conveniently. Moreover, the conventional methods are also disadvantageous in that they cannot directly measure the present amount of charge on the semiconductor device.